#1012077 linuxinfo FTBFS on riscv64

Package:
linuxinfo
Source:
linuxinfo
Description:
Displays extended system information
Submitter:
Alan Beadle
Date:
2022-06-05 14:39:06 UTC
Severity:
important
Tags:
#1012077#5
Date:
2022-05-29 18:45:29 UTC
From:
To:
Dear Maintainer,

linuxinfo currently fails to build on riscv64 due to this architecture not being
supported by upstream. I am attaching a patch which adds placeholder support for
this architecture and allows building the riscv64 debian package from source.

Please consider applying this patch (or similar) for the next upload.
In addition, the /proc information below is for a riscv64 VisionFive V1 SBC.

Thank you,
-Alan Beadle

#1012077#10
Date:
2022-05-30 06:36:55 UTC
From:
To:
Hello Alan,


Thanks a lot! This was on my wishlist already.

I'll review and possibly ammend your patch next weekend and then will
proceed with an upload.

Greetings

         Helge

#1012077#15
Date:
2022-05-30 06:36:55 UTC
From:
To:
Hello Alan,


Thanks a lot! This was on my wishlist already.

I'll review and possibly ammend your patch next weekend and then will
proceed with an upload.

Greetings

         Helge

#1012077#20
Date:
2022-06-01 03:36:11 UTC
From:
To:
user debian-riscv@lists.debian.org
usertag 1012077 + riscv64
stop

https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=1012077

Is there anybody use the riscv CPU other than sifive,u74-mc?
Welcome to supply CPU info.

Please also sent to 1012077@bugs.debian.org.

#1012077#25
Date:
2022-06-01 06:30:24 UTC
From:
To:
Hi, I have StarFive's VisionFive board.

StarFive VisionFive board's cpu info:

# cat /proc/cpuinfo
processor       : 0
hart            : 1
isa             : rv64imafdc
mmu             : sv39
uarch           : sifive,u74-mc

processor       : 1
hart            : 0
isa             : rv64imafdc
mmu             : sv39
uarch           : sifive,u74-mc

#1012077#30
Date:
2022-06-01 12:53:52 UTC
From:
To:
Hi,

There is one riscv CPU info:

Name: T-HEAD XuanTie C910

Info: https://www.t-head.cn/product/C910

cat /proc/cpuinfo

                                                                                                                                                                                           

processor       :
0                                                                                                                                                                                         
 
hart            :
0                                                                                                                                                                                         
 
isa             :
rv64imafdcsu                                                                                                                                                                              
 
mmu             :
sv39                                                                                                                                                                                      
 
model name      : T-HEAD
C910                                                                                                                                                                               
 
freq            :
1.2GHz                                                                                                                                                                                    
 
icache          :
64kB                                                                                                                                                                                      
 
dcache          :
64kB                                                                                                                                                                                      
 
l2cache         :
2MB                                                                                                                                                                                       
 
tlb             : 1024
4-ways                                                                                                                                                                               
 
cache line      :
64Bytes                                                                                                                                                                                   
 
address sizes   : 40 bits physical, 39 bits
virtual                                                                                                                                                         
 
vector version  : 0.7.1           

The board hardware info:
https://linux-hardware.org/?probe=bcb55ce8ce


I hope this CPU info add into linuxinfo package.

If need more infos about this CPU, please tell me.


Thanks!

在 2022/6/1 11:36, xiao sheng wen (肖盛文) 写道:

#1012077#35
Date:
2022-06-01 18:57:37 UTC
From:
To:
Hello all,
I'll work on this at the weekend, thanks for providing the
information, it is highly helpful!

Best greetings

             Helge

#1012077#40
Date:
2022-06-04 12:35:59 UTC
From:
To:
Hello Alan,
hello Bo,
hello Xiao,
hello Tienhock,
I have preliminary support for riscv now locally. However, there is a
design question:

How would you put riscv processors into families? On x86, thats done
be vendor and some marketing label ("AMD" and "Ryzen"). On Alpha,
that's the model (i.e. generation).

Looking at the cpuinfos you send me, I think the field "isa" is the
suitable one. Is this correct?

If so, what should linuxinfo write:
rv64imafdc → ???
rv64imafdcsu → ???
any other?

Some (but not all) cpuinfo also carry the field uarch. But since this
is not always present, it doesn't look like a good candidate.

Greetings

           Helge

#1012077#45
Date:
2022-06-04 12:52:40 UTC
From:
To:
Hi Helge,

It looks like this will always be a complex issue on RISC-V since
there is such a variety of manufacturers. However I think the
following would be the best approach.

First, if there is a uarch field, use that since it will describe the
design of the cores present, such as Sifive's U74-MC which can be
licensed to other manufacturers, in a similar way to ARM core IP.

If there isn't a uarch field, try to use the "model name" field if it
is present, since on the C910 this seems to replace the uarch field
(C910 is a core).

Finally, if neither of those fields exist, the isa field might be ok
but I would add "unknown core" to the output. The letters at the end
of the isa field indicate which instruction set extensions are
present. (i for basic integer support, a for atomics, v for vector,
etc) So it is useful info, but it is vendor-generic for the most part.

#1012077#50
Date:
2022-06-04 13:08:55 UTC
From:
To:
Hello Alan,

Ok, implented this.

Thanks!

I'll release the new version in the next days and then feedback is
highly welcome (as I cannot try it out myself).

Greetings

           Helge

#1012077#55
Date:
2022-06-05 02:58:08 UTC
From:
To:
Control: severity -1 important
...

Please note that FTBFS bugs on unofficial non-release arches like
riscv64 are not RC and so should only be filed at important severity.

Please note that bugs in specific Debian architectures should be
usertagged properly and XCCed to the architecture mailing list.
Thanks for xiao sheng wen(肖盛文) for fixing this particular bug.

https://wiki.debian.org/Teams/Debbugs/ArchitectureTags
https://www.debian.org/Bugs/Reporting#xcc

#1012077#62
Date:
2022-06-05 08:20:56 UTC
From:
To:
Hi,

    I just get ssh login to another riscv CPU, T-HEAD XuanTie C906, board.


cat
/proc/cpuinfo                                                                                                                                                                                
 
processor       :
0                                                                                                                                                                                         
 
hart            :
0                                                                                                                                                                                         
 
isa             :
rv64imafdcvu                                                                                                                                                                              
 
mmu             : sv39

This cpuinfo is very simply.

The CPU core detail info:

https://www.t-head.cn/product/C906?spm=a2ouz.12986968.0.0.48071384vJArq2

uname
-a                                                                                                                                                                                         
 
Linux d1 5.4.61 #1 Wed Jan 5 06:12:32 UTC 2022 riscv64 riscv64 riscv64
GNU/Linux 



在 2022/6/2 02:57, Helge Kreutzmann 写道:

Thanks!

#1012077#67
Date:
2022-06-05 13:21:33 UTC
From:
To:
Hello Xiao,

Thanks, "kind of" added. The output will not change much, as the
cpuinfo is very limited:

and thus the algorithm provided by Alan Beadle will cause an "Unkown"
to be printed.

But don't mind, simply send me those cpuinfos and I'll review and
(most often) update the detection.

Greetings

          Helge

#1012077#72
Date:
2022-06-05 14:35:44 UTC
From:
To:
We believe that the bug you reported is fixed in the latest version of
linuxinfo, which is due to be installed in the Debian FTP archive.

A summary of the changes between this version and the previous one is
attached.

Thank you for reporting the bug, which will now be closed.  If you
have further comments please address them to 1012077@bugs.debian.org,
and the maintainer will reopen the bug report if appropriate.

Debian distribution maintenance software
pp.
Helge Kreutzmann <debian@helgefjell.de> (supplier of updated linuxinfo package)

(This message was generated automatically at their request; if you
believe that there is a problem with it please contact the archive
administrators by mailing ftpmaster@ftp-master.debian.org)
Format: 1.8
Date: Sun, 05 Jun 2022 16:03:56 +0200
Source: linuxinfo
Architecture: source
Version: 4.0.0-1
Distribution: unstable
Urgency: medium
Maintainer: Helge Kreutzmann <debian@helgefjell.de>
Changed-By: Helge Kreutzmann <debian@helgefjell.de>
Closes: 1012077 1012343 1012347
Changes:
 linuxinfo (4.0.0-1) unstable; urgency=medium
 .
   * New upstream release.
   * Support for RiscV added, thanks to Alan Beadle, xiao sheng wen
     (肖盛文) and Tienhock Loh. Closes: #1012077.
   * Add a first Intel Core m3, thanks to xiao sheng wen (肖盛文).
     Closes: #1012343
   * Add a new CPU implementer (Phytium) for Arm64, thanks xiao sheng wen
     (肖盛文). Closes: #1012347.
   * Update debian/copyright.
   * Update to standards version 4.6.1 (no change required).
Checksums-Sha1:
 05167ea6739092762cb18ed2461e78340d980b56 1924 linuxinfo_4.0.0-1.dsc
 52b8cdbed367253455dbc2572307da1af3a7cdea 163752 linuxinfo_4.0.0.orig.tar.xz
 aa7876c8397a6bae561a3500dc9ce54a7fdaa755 16440 linuxinfo_4.0.0-1.debian.tar.xz
 c723db69ace7e9566378ce89e7153f6f2f5c82a9 6625 linuxinfo_4.0.0-1_amd64.buildinfo
Checksums-Sha256:
 0e841f4b2877030dadde7444bff69e9689977d032bce2223e3dc07380a26e850 1924 linuxinfo_4.0.0-1.dsc
 51ed43bb51759404e9b4b45cd55c06ba025e4e50649d69cf896e6b6e7ed50150 163752 linuxinfo_4.0.0.orig.tar.xz
 bf1919e5af66dedf938466b2c92fc28b88a54a718841fa54003119e9e5eeec91 16440 linuxinfo_4.0.0-1.debian.tar.xz
 c47a27a0f2b0580c57abff561fa1734ddb9ac6a94cfe78b6e1096a0087f0b41c 6625 linuxinfo_4.0.0-1_amd64.buildinfo
Files:
 760eaf397a34493c3001b92399ba7f39 1924 utils optional linuxinfo_4.0.0-1.dsc
 358feffff29c764841be1f1a06350f2b 163752 utils optional linuxinfo_4.0.0.orig.tar.xz
 15201def49be759061f38bb718c2cfc7 16440 utils optional linuxinfo_4.0.0-1.debian.tar.xz
 3636cce0a13746f773b5479380e64e83 6625 utils optional linuxinfo_4.0.0-1_amd64.buildinfo
-----BEGIN PGP SIGNATURE-----

iQJJBAEBCgAzFiEEbZZfteMW0gNUynuwQbqlJmgq5nAFAmKcvFoVHGRlYmlhbkBo
ZWxnZWZqZWxsLmRlAAoJEEG6pSZoKuZwGdAP/jYfmZTDeZFg//0qPOOBINAYFhlJ
feH0NYXNWq2eOxwmFdzpSIX85QryGqWy1cYyzIwnKA5I1cwXQmExxzi+H0QtXll5
z0ajJwOdZ5iZRSu0AmSUIpUwymQKUPkdOCPtB+BzTS+5uoHNg92iKf4uWw5Hf66V
WUoIc8giTfRtnYrABcxJwDv3wT5sjDkv+bJNE0GPr4ul5e/eHBJ5ZgvZlfZ7XNmG
pH/2Y9Q2mqhZzz9Ws/0COM6zy0de4TVBxQLvG46OViPWjLHUV8T67itqAgRv6hPe
xba3gwd+H7R7VeNksU9n2XAHDIActQFcBVXvvDitDZ11cuoZ88YtMiAxlsT8nqjn
eI8EzBH1W6Rl1iL8N4xA4+nJMOhlMRGvzZw6ON8iWzuUxG84Kt9p0PbmypZeD3za
ELEowHvjuqtS8vO5aXjFM9penKbCmsgNme5lTqNtkPKAWu5IYLR5DxKC3P+XJuzP
8lmJ+JxK5EdTLyILe8eQ4H/vz15TZTVupJUQg7A6i+OTqJJ167DmwlZLPGpn0yMv
rQlEkAe/yTW+5fIY9IC5z98/ydymIp4meEn7I5kraFIEUgTx9QK7pBWllmJhAefk
PjHIMyTKCbW2bFu8mHNH2ztKVOd4dJUjwnwfL2flYBWI7Nsc8qzNEmAYa2P9KcDL
jdni3WE4Ek61RTS8
=8pEn
-----END PGP SIGNATURE-----