Hardware: HP ProLiant DL360 G5, BIOS P58 (05/02/2011), iLO2 fw 1.50
CPU: 2x Intel Xeon E5420 (Harpertown), 8 cores; intel-microcode not
installed
Chipset: Intel 5000P; storage: HP Smart Array P400, root on LVM

Symptom:
~20 s into boot, inside initramfs:
  rcu: INFO: rcu_preempt detected stalls on CPUs/tasks:
  rcu: 4-...!: (0 ticks this GP) idle=... softirq=243/243 fqs=0 (false
positive?)
  rcu: 6-...!: (3 GPs behind) idle=... softirq=38/38 fqs=0 (false positive?)
  rcu: rcu_preempt kthread timer wakeup didn't happen for 5251 jiffies!
  rcu: Possible timer handling issue on cpu=4 timer-softirq=16
  rcu: rcu_preempt kthread starved for 5252 jiffies! ->cpu=4
Followed by udev-worker tasks blocked >120 s, "Timed out while waiting for
udev queue to empty", root LV on Smart Array not found -> initramfs shell.
System unresponsive; only a power cycle recovers.

Observed:
- 6.12.111+deb13: hangs on every boot without workaround (2/2)
- 6.12.101+deb13: hangs on every boot without workaround (2/2), although the
  same kernel with default cmdline booted fine at an earlier date
- Reproduces after full AC power cycles

Workaround: processor.max_cstate=1
With it, both 6.12.101 and 6.12.111 boot reliably (incl. unattended reboot).
cpuidle driver is acpi_idle; dis_ucode_ldr and intel_idle.max_cstate=0 were
also on the cmdline but are no-ops on this system.

Testing limitations:
This is a remotely colocated production server with no out-of-band power
control. Every failed boot requires datacenter staff to power-cycle it, so
I am unable to run further boot tests (other kernels, bisection, removing
the workaround). I can provide any information collectable from the running
system with the workaround in place.

Observations:
- Stalled CPUs are ALWAYS 4 and 6 = APIC IDs 1 and 3 = physical package 0,
  core ids 1 and 3. Never any stall on package 1.
- No MCE, empty BMC SEL, all IPMI sensors OK.
- HPET present and registered as tick broadcast device; clocksource tsc.
- ACPI: 8 per-CPU SSDTs (OEM table IDs CPUnCST), identical apart from CPU
index.
  _CST offers C1 (FFixedHW, latency 1) and C3 (SystemIO 0x915 = P_LVL3,
  latency 17 us). No C2.
  FADT: C2 latency 0xFFFF, C3 latency 0x3C (60 us), inconsistent with _CST.
  Firmware bug: _CST guard is "If ((PDCn && 0x10) && (CC3S && One))" -
  logical instead of bitwise AND.

Attached: dmesg (good boot with workaround), cmdline, /proc/timer_list,
/proc/interrupts, lscpu, CPU topology, dmidecode, acpidump, console photos.